FPGA's for Data Processing
A FPGA consists of a large array of low level electronic gate blocks, each of which can be configured in a number of ways. These gate blocks are interconnected by a large switched matrix. The FPGA's configuration, including the gates interconnection scheme, can be dynamically loaded from a host computer system. This allows a custom, optimised, hardware design to be loaded, at system run time, into the FPGA to perform a particular task. 
Today's FPGA's have relatively slow clock speeds, in the order of 300 MHz, but they are inherently highly parallel, both in terms of processing and internal data communications. It is this parallelism that allows them to perform relatively complex tasks at a very high speed. The size of these FPGA is increasing all of the time, it is now possible to get devices with up to around 8 million effective low level gates allowing quite complex tasks to be performed. 
AstroFFT Processing Engine
The AstroFFT processing engine has been designed for performing the work of a fast real time spectrometer using a FFT algorithm together with power calculator and integrator.