Specifications
·  Input signal: 2v p-p  into 50 ohm on each channel. 
·  Input Clock:  50 Mhz digital clock input into 100 ohm. 
·  Internal 50Mhz digital clock. 
·  Clock source selection with programmable divider. 
·  Anti-aliasing filters on each channel: 6 pole elliptic filter, 1 KHz to 23 MHz +-1 dB. 
·  Two 50Mhz 14 bit analogue to digital samplers per processing engine. 
·  FFT Algorithm: 4096 point, 14 bit with adaptive scaling  in 82 micro seconds. 
·  Spectrum power Integrator: operates in parallel with the FFT algorithm, 64 bit depth. 
·  Further integration on the host using 64 bit floating point arithmetic. 
·  10/100 baseT Ethernet network interface. 
·  Standard algorithms: analogue data capture, fft processing, quadrature fft processing.